1. Field of the Invention
The present invention relates to the field of synchronous circuits; more specifically, it relates to a lockout timer for synchronous circuits and especially for synchronous dynamic random access memory circuits.
2. Background of the Invention
Generally synchronous circuits, such a synchronous dynamic random access memory (SDRAM) circuits are designed to run at a pre-determined clock speed and with specified minimum fixed timings between critical input/output (I/O) events. It would be cost-effective to design and build synchronous circuits that can run at more than one clock speed as well as meet more than one set of I/O event timing specifications.